1. Field of the Invention
The present invention generally relates to memory testing methods and apparatuses and computer-readable recording mediums, and more particularly to a memory testing method, a memory testing apparatus and a computer-readable recording medium for use in testing a clock synchronized type memory typified by a synchronous DRAM (SDRAM).
A memory testing apparatus is used to judge the existence of a defect in a memory, by writing test data to the memory and then reading the test data from the memory. Such a testing of the memory is carried out at a manufacturing stage of the memory, when shipping the memory, when delivering the memory to the user, or the like.
2. Description of the Related Art
FIG. 1 is a time chart for explaining an example of a conventional method of testing the SDRAM. As shown in FIG. 1, test data D0, D1, D2, . . . written in the SDRAM are successively read from corresponding addresses in synchronism with a rising edge of a clock. Anticipated values C0, C1, C2, . . . of the test data D0, D1, D2, . . . are prestored in a buffer or the like, and the test data D0, D1, D2, . . . actually read from the SDRAM and the corresponding anticipated values C0, C1, C2, . . . are compared with timings determined by strobe pulses T0, T1, T2, . . . . The timing of the strobe pulses T0, T1, T2, . . . is determined with reference to the rising edge or the falling edge of the clock.
For example, if the read test data D1 does not match the corresponding anticipated value A1 as a result of the comparison, it is judged that a defect exists in the SDRAM.
However, according to the conventional memory testing method, it is necessary to prestore the anticipated values C0, C1, C2, . . . corresponding to the test data D0, D1, D2, . . . in the buffer or the like. Hence, there are problems in that hardware such as a buffer having a relatively large storage capacity is required, thereby making the construction of the memory testing apparatus complex and expensive. In addition, since the anticipated values C0, C1, C2, . . . corresponding to each of the test data D0, D1, D2, . . . are read from the buffer or the like and compared with the corresponding test data D0, D1, D2, . . . , there is another problem in that there is a limit to increasing the testing speed.
On the other hand, in the memory testing apparatus which employs the conventional memory testing method described above, it is impossible to test a so-called double data rate (DDR) type memory which is constructed to successively read the data in synchronism with both the rising edge and the falling edge of the clock. For this reason, a high-speed memory testing apparatus exclusively for testing the DDR type memory is required to test the DDR type memory, and there is a problem in that a high-speed memory such as the DDR type memory cannot be tested at a high speed using the memory testing apparatus having the inexpensive construction.
Accordingly, it is a general object of the present invention to provide a novel and useful memory testing method and apparatus and a computer-readable recording medium, in which the problems described above are eliminated.
Another and more specific object of the present invention is to provide a memory testing method and apparatus and a computer-readable recording medium which enable testing of a memory at a high speed using a memory testing apparatus having a simple and inexpensive construction, and also enable testing of a high-speed memory such as the DDR type memory.
Still another object of the present invention is to provide a memory testing method for testing a memory by writing test data to and reading test data from the memory, comprising the steps of (a) out of data successively read from the memory in synchronism with a clock, comparing one of two data consecutively read from the memory as an anticipated data with another of the two data, and judging a defect in the memory based on a result of a comparison made in said step (b). According to the memory testing method of the present invention, it is possible to test at a high speed a memory using a memory testing apparatus having a simple and inexpensive construction, and a high-speed memory such as a DDR type memory can also be tested at a high speed.
A further object of the present invention is to provide a memory testing apparatus comprising writing and reading means for writing test data to and reading the test data from the memory, comparing means for comparing one of two data consecutively read from the memory as an anticipated data with another of the two data, out of data successively read from the memory by said writing and reading means in synchronism with a clock, and outputting a comparison result, and judging means for judging whether or not the memory is detective based on the comparison result obtained from said comparing means. According to the memory testing apparatus of the present invention, it is possible to test at a high speed a memory using a memory testing apparatus having a simple and inexpensive construction, and a high-speed memory such as a DDR type memory can also be tested at a high speed.
Another object of the present invention is to provide a computer-readable recording medium which stores a program for causing a computer to test a memory by writing test data to and reading the test data from the memory, comprising means for causing the computer to compare one of two data consecutively read from the memory as an anticipated data with another of the two data, out of data successively read from the memory in synchronism with a clock, and outputting a comparison result, and means for causing the computer to judge whether or not the memory is detective based on the comparison result. According to the computer-readable recording medium of the present invention, it is possible to test at a high speed a memory using an inexpensive general purpose computer, and a high-speed memory such as a DDR type memory can also be tested at a high speed.